Download Analog IC Design with Low-Dropout Regulators (LDOs) by Gabriel Rincon-Mora PDF

By Gabriel Rincon-Mora

Master Analog Integrated-Circuit Design

Design, learn, and construct linear low-dropout (LDO) regulator ICs in bipolar, CMOS, and biCMOS semiconductor technique applied sciences. This authoritative consultant deals a different emphasis on embedded LDO layout. via intuitive factors and specific illustrations, the ebook exhibits how one can positioned those theories to paintings growing analog ICs for the most recent transportable, battery-powered devices.

Analog IC layout with Low-Dropout Regulators info the total product improvement cycle-from defining pursuits and choosing parts to blueprinting, assembling, and fine-tuning functionality. paintings with semiconductors, hire destructive suggestions, deal with fluctuating so much, and embed regulators in ICs. additionally, you will the best way to construct prototypes, practice assessments, and combine system-on-chip (SoC) performance. become aware of how to:

  • Design, try out, and gather BJT-, MOSFET-, and JFET-based linear regulators
  • Use present mirrors, buffers, amplifiers, and differential pairs
  • Integrate suggestions loops, destructive suggestions, and keep an eye on limits
  • Maintain an autonomous, solid, noise-free, and predictable output voltage
  • Compensate for low enter present and vast voltage swings
  • Optimize accuracy, potency, battery lifestyles, and integrity
  • Implement overcurrent safeguard and thermal-shutdown features
  • Establish strength and working limits utilizing characterization suggestions

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Additional info for Analog IC Design with Low-Dropout Regulators (LDOs) (Electronic Engineering)

Sample text

Com) Copyright © 2009 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. System Considerations 30 Chapter One regulator has time to react, charges the output filter capacitors. , feedback network) to discharge and slew the output capacitor back to its targeted output voltage. The resulting variation of the regulated output in response to these load dumps degrades the overall regulating performance of the regulator and amounts to transient accuracy.

As noted in Fig. EFF), which, for technical accuracy, should be distinct and decoupled from the total effects transient-response accuracy has on the output (ΔvTR). Load-regulation voltage drop ΔVLDR is therefore subtracted from total load-dump-induced variations ΔvTR+ and ΔvTR–. During a positive load dump, when load current suddenly increases, referring to the effective load model shown in Fig. 11, output capacitor COUT and total bypass capacitor CB′ supply additional load current ΔiLOAD. 16) and a droop voltage across COUT and CB′.

C1 ≡ C2). com) Copyright © 2009 The McGraw-Hill Companies. All rights reserved. Any use is subject to the Terms of Use as given at the website. Microelectronic Devices Microelectronic Devices 51 As stated earlier, capacitance depends on the overlapping surface area between the top and bottom plates of a parallel-plate capacitor so etching errors on the top plate, as the plate that defines surface area A, are more important than errors on the bottom plate. To that end, ensuring proximity effects remain uniform across a matching capacitor array amounts to adding dummy top-plate strips to the surrounding periphery.

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